新型双声道音频- DAC小面积插值滤波器的设计实现
doi: 10.3724/SP.J.1146.2010.00587 cstr: 32379.14.SP.J.1146.2010.00587
Design and Implementation of a Hardware-efficient Novel Digital Interpolation Filter Applied to Stereo Audio Sigma-Delta DAC
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摘要: 该文提出了一种新型双声道音频-数模转换器(DAC)小面积插值滤波器设计方法。该方法采用左右两个声道复用一个插值滤波器的新型结构，并利用存储器实现第1级半带滤波器，从而降低芯片的实现面积。提出重新排序方法，保证复用后两个声道的同步。设计在TSMC 0.18m 1.8 V/3.3 V 1P5M CMOS工艺上实现，测试信噪比为106 dB，数字部分芯片的面积仅为0.198 mm2，功耗为0.65 mW。这种设计方法降低了- DAC系统中数字部分的面积和功耗，给模拟部分留有较大的设计裕量，这对模数混合系统的设计具有重要的意义。
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关键词:
- -数模转换器(DAC) /
- 插值滤波器 /
- 双声道复用 /
- 重新排序
Abstract: A novel design method for hardware-efficient digital interpolation filter applied to stereo audio Sigma- Delta Digital-to-Analog Converter (- DAC) is proposed in this paper. The method proclaims a new structure of multiplexing the interpolation filter by the left and right channel. The reorder technique is presented to keep the two channels being completely synchronization after multiplexing. The design is fabricated on TSMC 0.18m 1.8 V/3.3 V 1P5M CMOS process. The measurement results show that the DAC achieves 106 dB SNR over the 20 kHz audio band. The digital part of chip occupies only 0.198 mm2 and dissipates only 0.65 mW power. This design method benefits low chip area and power consumption and leaves much more design margin to the analog part of the - DAC, which provides important significance in mixed-signal system design. -
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