An Efficient Reliability Estimation Method for Gate-level Circuit

With the development of semiconductor technologies and integration of chips, soft errors become the key factor influencing circuit reliability. In order to estimate the effects of soft errors, a reliability calculation method of gate-level circuit based on signals probability is proposed. All signals probabilities under soft errors are calculated first, and then the whole reliability is estimated using fault simulation. The proposed method is compared with the probabilistic transfer matrix approach and benchmark circuit experiments are finished, results show the method has the same accuracy as the Probabilistic Transfer Matrix (PTM) approach, but it needs shorter time and less space, especially suitable for calculation of reliability under specific vector and random vectors.