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Volume 31 Issue 6
Jun.  2009
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Liu Jun-hua, Yang Hai-gang, Li Wei. A Novel Testing Method Based on Matching Theory for Three Stage Interconnect Network in FPGA[J]. Journal of Electronics & Information Technology, 2009, 31(6): 1479-1482. doi: 10.3724/SP.J.1146.2008.00538
Citation: Liu Jun-hua, Yang Hai-gang, Li Wei. A Novel Testing Method Based on Matching Theory for Three Stage Interconnect Network in FPGA[J]. Journal of Electronics & Information Technology, 2009, 31(6): 1479-1482. doi: 10.3724/SP.J.1146.2008.00538

A Novel Testing Method Based on Matching Theory for Three Stage Interconnect Network in FPGA

doi: 10.3724/SP.J.1146.2008.00538 cstr: 32379.14.SP.J.1146.2008.00538
  • Received Date: 2008-04-28
  • Rev Recd Date: 2008-12-16
  • Publish Date: 2009-06-19
  • Aimed to testing interconnect network that includes 3-stage programmable switches in FPGA, this paper proposes a novel size-independent approach based on a matching theory to minimize the number of test configurations. By constructing the graph of structure test, this paper presents a slicing scheme based on the path pace of the graph, and a method that applies the minimum coverage and maximum matching principle from the graph theory to obtain the minimum number of test configurations. For different interconnect network structure, the number of test configurations in the proposed method is reduced by at least 10% compared with other methods.
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