High-Performance Architecture of Deblocking Filter for AVS Video Coding

Fang Jian; Ling Bo; Wang Kuang

doi:10.3724/SP.J.1146.2007.01437

Volume 31 Issue 2

Dec. 2010

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Fang Jian, Ling Bo, Wang Kuang. High-Performance Architecture of Deblocking Filter for AVS Video Coding[J]. Journal of Electronics & Information Technology, 2009, 31(2): 505-508. doi: 10.3724/SP.J.1146.2007.01437

Citation:

Fang Jian, Ling Bo, Wang Kuang. High-Performance Architecture of Deblocking Filter for AVS Video Coding[J]. Journal of Electronics & Information Technology, 2009, 31(2): 505-508. doi: 10.3724/SP.J.1146.2007.01437

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High-Performance Architecture of Deblocking Filter for AVS Video Coding

doi: 10.3724/SP.J.1146.2007.01437 cstr: 32379.14.SP.J.1146.2007.01437

Received Date: 2007-09-10
Rev Recd Date: 2008-07-03
Publish Date: 2009-02-19

Abstract

Abstract

In the video decoder for AVS, deblocking filter becomes one of the bottom necks for real-time processing. An implement architecture for deblocking filter is proposed in this paper. With a novel filtering order, the unfiltered data storage is reduced to a 168 block instead of whole 1616 macroblock。With data reuse strategy, the intermediate data storage is also reduced efficiently. The experiment shows the proposed design can achieve 50 MHz with only gate count of 9.2k by using 0.18m CMOS technology. When clocked at 50MHz, the proposed design can support real-time deblocking of HD1080 (19801088@30Hz) video application.

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References(1)

References

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